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ST1S40IPUR Fiches technique(PDF) 17 Page - STMicroelectronics

No de pièce ST1S40IPUR
Description  3 A DC step-down switching regulator
PDF  30 Pages
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Fabricant  STMICROELECTRONICS [STMicroelectronics]
Site Internet  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST1S40IPUR Fiches technique(HTML) 17 Page - STMicroelectronics

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ST1S40
Application information
Doc ID 17928 Rev 4
17/30
6.4
Thermal dissipation
The thermal design is important in order to prevent thermal shutdown of the device if
junction temperature goes above 150 °C. The three different sources of losses within the
device are:
a)
conduction losses due to the ON resistance of high side switch (RHS) and low side
switch (RLS); these are equal to:
Equation 22
where D is the duty cycle of the application. Note that the duty cycle is theoretically given by
the ratio between VOUT and VIN, but is actually slightly higher to compensate the losses of
the regulator.
b)
switching losses due to high side Power MOSFET turn ON and OFF; these can be
calculated as:
Equation 23
where TRISE and TFALL are the overlap times of the voltage across the high side power
switch (VDS) and the current flowing into it during turn ON and turn OFF phases, as shown
in Figure 7. TSW is the equivalent switching time. For this device the typical value for the
equivalent switching time is 20 ns.
c)
Quiescent current losses, calculated as:
Equation 24
Table 8.
Output capacitors
Manufacturer
Series
Cap value (
μF)
Rated voltage (V)
ESR (m
Ω)
MURATA
GRM32
22 to 100
6.3 to 25
< 5
GRM31
10 to 47
6.3 to 25
< 5
PANASONIC
ECJ
10 to 22
6.3
< 5
EEFCD
10 to 68
6.3
15 to 55
SANYO
TPA/B/C
100 to 470
4 to 16
40 to 80
TDK
C3225
22 to 100
6.3
< 5
P
COND
R
HS
I
OUT
2
DR
LS
I
OUT
2
1D
–
()
⋅⋅
+
⋅⋅
=
P
SW
V
IN
I
OUT
T
RISE
T
FALL
+
()
2
------------------------------------------- Fsw
⋅⋅
⋅
V
IN
I
OUT
T
SW
F
SW
⋅⋅
⋅
==
P
Q
V
IN
I
Q
⋅
=



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