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XC7SET08 Fiches technique(PDF) 2 Page - NXP Semiconductors |
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XC7SET08 Fiches technique(HTML) 2 Page - NXP Semiconductors |
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2 / 11 page ![]() XC7SET08_1 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 01 — 1 September 2009 2 of 11 NXP Semiconductors XC7SET08 2-input AND gate 4. Marking [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram 6. Pinning information 6.1 Pinning 6.2 Pin description Table 2. Marking codes Type number Marking[1] XC7SET08GW gE XC7SET08GV g08 Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram mna113 B A Y 2 1 4 mna114 2 4 & 1 mna221 A B Y Fig 4. Pin configuration SOT353-1 (TSSOP5) and SOT753 (SC-74A) XC7SET08 BVCC A GND Y 001aak112 1 2 3 5 4 Table 3. Pin description Symbol Pin Description B 1 data input A 2 data input GND 3 ground (0 V) Y 4 data output VCC 5 supply voltage |
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