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TDA7407D Fiches technique(PDF) 23 Page - STMicroelectronics |
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TDA7407D Fiches technique(HTML) 23 Page - STMicroelectronics |
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23 / 34 page ![]() Obsolete Product(s) - Obsolete Product(s) Obsolete Product(s) - Obsolete Product(s) 23/34 TDA7407D Figure 26. Mute Control Logic 7I2C BUS INTERFACE DESCRIPTION 7.1 Interface Protocol The interface protocol comprises: -a start condition (S) -a chip address byte (the LSB bit determines read / write transmission) -a subaddress byte -a sequence of data (N-bytes + acknowledge) -a stop condition (P) Figure 27. D97AU627 S 1 0 0 0 1 1 0 R/W ACK ACK ACK P MSB LSB MSB LSB MSB LSB CHIP ADDRESS X I SUBADDRESS DATA 1 to DATA n AZ T A3 A2 A1 A0 DATA Obsolete Product(s) - Obsolete Product(s) |
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