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74ACT74SC Fiches technique(PDF) 2 Page - Fairchild Semiconductor |
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74ACT74SC Fiches technique(HTML) 2 Page - Fairchild Semiconductor |
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2 / 9 page ![]() www.fairchildsemi.com 2 Logic Symbols IEEE/IEC Truth Table (Each Half) H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial = LOW-to-HIGH Clock Transition Q0 (Q0) = Previous Q (Q) before LOW-to-HIGH Transition of Clock Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. Inputs Outputs SD CD CP D Q Q LH X X H L HL X X L H LL X X H H HH HH L HH LL H HH L X Q0 Q0 |
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