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SST25PF020B Fiches technique(PDF) 21 Page - Microchip Technology |
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SST25PF020B Fiches technique(HTML) 21 Page - Microchip Technology |
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21 / 33 page ![]() 2012 Microchip Technology Inc. DS25135A-page 21 SST25PF020B TABLE 5-4: CAPACITANCE (TA = 25°C, F=1 MHZ, OTHER PINS OPEN) Parameter Description Test Condition Maximum COUT 1 Output Pin Capacitance VOUT = 0V 12 pF CIN 1 Input Capacitance VIN = 0V 6 pF 1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter. TABLE 5-5: RELIABILITY CHARACTERISTICS Symbol Parameter Minimum Specification Units Test Method NEND 1 1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter. Endurance 10,000 Cycles JEDEC Standard A117 TDR 1 Data Retention 100 Years JEDEC Standard A103 ILTH 1 Latch Up 100 + IDD mA JEDEC Standard 78 TABLE 5-6: AC OPERATING CHARACTERISTICS, 2.3-2.7V Symbol Parameter 25 MHz 50 MHz Units MinMax MinMax FCLK 1 1. Maximum clock frequency for Read instruction, 03H, is 25 MHz Serial Clock Frequency 25 50 MHz TSCKH Serial Clock High Time 18 9 ns TSCKL Serial Clock Low Time 18 9 ns TSCKR Serial Clock Rise Time (Slew Rate) 0.1 0.1 V/ns TSCKF Serial Clock Fall Time (Slew Rate) 0.1 0.1 V/ns TCES 2 2. Relative to SCK CE# Active Setup Time 55 ns TCEH 2 CE# Active Hold Time 55 ns TCHS 2 CE# Not Active Setup Time 55 ns TCHH 2 CE# Not Active Hold Time 55 ns TCPH CE# High Time 50 50 ns TCHZ CE# High to High-Z Output 77 ns TCLZ SCK Low to Low-Z Output 00 ns TDS Data In Setup Time 22 ns TDH Data In Hold Time 44 ns THLS HOLD# Low Setup Time 55 ns THHS HOLD# High Setup Time 55 ns THLH HOLD# Low Hold Time 55 ns THHH HOLD# High Hold Time 55 ns THZ HOLD# Low to High-Z Output 77 ns TLZ HOLD# High to Low-Z Output 77 ns TOH Output Hold from SCK Change 00 ns TV Output Valid from SCK 12 8 ns TSE Sector-Erase 25 25 ms TBE Block-Erase 25 25 ms TSCE Chip-Erase 50 50 ms TBP Byte-Program 10 10 µs |
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