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LIS2DHTR Fiches technique(PDF) 14 Page - STMicroelectronics

No de pièce LIS2DHTR
Description  ultra low-power high performance 3-axis ?쐄emto??accelerometer
PDF  50 Pages
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Fabricant  STMICROELECTRONICS [STMicroelectronics]
Site Internet  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

LIS2DHTR Fiches technique(HTML) 14 Page - STMicroelectronics

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Mechanical and electrical specifications
LIS2DH
14/49
Doc ID 022516 Rev 1
2.4.2
I2C - Inter IC control interface
Subject to general operating conditions for Vdd and top.
Figure 4.
I2C Slave timing diagram (e)
Table 7.
I2C slave timing values
Symbol
Parameter
I2C standard mode (1)
I2C fast mode (1)
Unit
Min
Max
Min
Max
f(SCL)
SCL clock frequency
0
100
0
400
kHz
tw(SCLL)
SCL clock low time
4.7
1.3
µs
tw(SCLH)
SCL clock high time
4.0
0.6
tsu(SDA)
SDA setup time
250
100
ns
th(SDA)
SDA data hold time
0
3.45
0.01
0.9
µs
tr(SDA) tr(SCL)
SDA and SCL rise time
1000
20 + 0.1Cb
(2)
300
ns
tf(SDA) tf(SCL)
SDA and SCL fall time
300
20 + 0.1Cb
(2)
300
th(ST)
START condition hold time
4
0.6
µs
tsu(SR)
Repeated START condition
setup time
4.7
0.6
tsu(SP)
STOP condition setup time
4
0.6
tw(SP:SR)
Bus free time between STOP
and START condition
4.7
1.3
1.
Data based on standard I2C protocol requirement, not tested in production.
2.
Cb = total capacitance of one bus line, in pF.
e.
Measurement points are done at 0.2·Vdd_IO and 0.8·Vdd_IO, for both port.
SPC
CS
SDI
SDO
tsu(CS)
tv(SO)
th(SO)
th(SI)
tsu(SI)
th(CS)
tdis(SO)
tc(SPC)
MSB IN
MSB OUT
LSB OUT
LSB IN
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(3)



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