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OP249ARC/883 Fiches technique(PDF) 5 Page - Analog Devices

No de pièce OP249ARC/883
Description  Dual, Precision JFET High Speed Operational Amplifier
PDF  17 Pages
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
Logo AD - Analog Devices

OP249ARC/883 Fiches technique(HTML) 5 Page - Analog Devices

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OP249
–5–
REV. C
DICE CHARACTERISTICS
WAFER TEST LIMITS
OP249GBC
Parameter
Symbol
Conditions
Limits
Units
Offset Voltage
VOS
0.5
mV max
Offset Voltage Temperature Coefficient
TCVOS
–40
°C ≤ T
J ≤ 85°C
6.0
µV/°C max
Input Bias Current
IB
VCM = 0 V
225
pA max
Input Offset Current
IOS
VCM = 0 V
75
pA max
Input Voltage Range
IVR
(Note 1)
±11
V min
Common-Mode Rejection
CMR
VCM =
±11 V
76
dB min
Power Supply Rejection Ratio
PSRR
VS =
±4.5 V to ±18 V
100
µV/V max
Large-Signal Voltage Gain
AVO
RL = 2 kΩ
250
V/mV min
Output Voltage Swing
VO
RL = 2 k
Ω±12.0
V min
Short-Circuit Current Limit
ISC
Output Shorted to Ground
±20/±60
mA min/max
Supply Current
ISY
No Load; VO = 0 V
7.0
mA max
Slew Rate
SR
RL = 2 k
Ω, C
L = 50 pF
16.5
V/
µs min
NOTES
1Guaranteed by CMR test.
Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed
for standard product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing.
(@ VS =
15 V, TJ = +25 C unless otherwise noted)
OUT (A)
–IN (A)
+IN (A)
V–
+IN (B)
–IN (B)
OUT (B)
V+
DIE SIZE 0.072
0.112 inch, 8,064 sq. mils
(1.83
2.84 mm, 5.2 sq. mm)



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