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RT9724 Fiches technique(PDF) 2 Page - Richtek Technology Corporation |
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RT9724 Fiches technique(HTML) 2 Page - Richtek Technology Corporation |
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2 / 13 page ![]() RT9724 2 DS9724-02 July 2012 www.richtek.com © Copyright 2012 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. Function Block Diagram Functional Pin Description Pin No. SOT-23-5 WDFN-8L 2x2 Pin Name Pin Function 1 3 EN Chip Enable (Active High). 2 4, 9 (Exposed Pad) GND Ground. The exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation. 3 2 VOUT Power-Switch Output. 4, 5 5, 6, 7, 8 VIN Power Input Voltage. -- 1 NC No Internal Connection. Gate Control Output Voltage Detection Oscillator UVLO Charge Pump Bias Thermal Protection Current Limiting VOUT VIN GND EN Auto Discharge Typical Application Circuit VOUT VIN GND RT9724 2.7V to 5.5V EN Chip Enable Load COUT 0.1µF 1µF CIN |
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