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SST45VF512 Fiches technique(PDF) 3 Page - Silicon Storage Technology, Inc

No de pièce SST45VF512
Description  512 Kbit / 1 Mbit / 2 Mbit Serial Flash
PDF  16 Pages
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Fabricant  SST [Silicon Storage Technology, Inc]
Site Internet  http://www.sst.com/
Logo SST - Silicon Storage Technology, Inc

SST45VF512 Fiches technique(HTML) 3 Page - Silicon Storage Technology, Inc

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© 2000 Silicon Storage Technology, Inc.
512 Kbit / 1 Mbit / 2 Mbit Serial Flash
SST45VF512 / SST45VF010 / SST45VF020
Advance Information
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S71178
514-1 10/00
FIGURE 1: PIN ASSIGNMENTS FOR 8-PIN SOIC
1
2
3
4
8
7
6
5
WP#
VDD
CE#
SCK
RESET#
VSS
SO
SI
Standard Pinout
Top View
Die Up
514 ILL F01.0
TABLE 2: PIN DESCRIPTION
Symbol
Pin Name
Functions
SCK
Serial Clock
To provide the timing of the serial interface. Commands, addresses, or
input data are latched on the rising edge of the clock input, while output
data is shifted out on the falling edge of the clock input.
SI
Serial Data Input
To transfer commands, addresses, or data serially into the device. Inputs
are latched on the rising edge of the serial clock.
SO
Serial Data Output
To transfer data serially out of the device. Data is shifted out on the
falling edge of the serial clock.
CE#
Chip Enable
The device is enabled by a high to low transition on CE#.
WP#
Write Protect
To protect the device from unintentional Write (Erase or Program)
operations. When WP# is low, all Erase and Program commands are
ignored. When WP# is high, the device may be erased or programmed.
This pin has an internal pull-up and could remain unconnected when not used.
RESET#
Reset
A high to low transition on RESET# will terminate any operation in progress
and reset the internal logic to the standby mode. The device will remain in the
reset condition as long as the RESET# is low. Operations may only occur
when RESET# is high. This pin has an internal pull-up and could remain
unconnected when not used.
VDD
Power Supply
To provide power supply (2.7-3.6V).
VSS
Ground
514 PGM T2.2



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