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STGIPN3H60A Fiches technique(PDF) 12 Page - STMicroelectronics |
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STGIPN3H60A Fiches technique(HTML) 12 Page - STMicroelectronics |
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12 / 17 page ![]() Application information STGIPN3H60A 12/17 Doc ID 018958 Rev 3 4.1 Recommendations ● Input signals HIN, LIN are active-high logic. A 500 k Ω (typ.) pull-down resistor is built-in for each high side input. If an external RC filter is used for noise immunity, attention should be given to the variation of the input signal level. ● To prevent input signal oscillation, the wiring of each input should be as short as possible. ● By integrating an application-specific type HVIC inside the module, direct coupling to the MCU terminals without an opto-coupler is possible. ● Each capacitor should be located as close as possible to the pins of the IPM. ● Low inductance shunt resistors should be used for phase leg current sensing. ● Electrolytic bus capacitors should be mounted as close to the module bus terminals as possible. Additional high frequency ceramic capacitors mounted close to the module pins will further improve performance. Note: For further details refer to AN4043. Table 11. Recommended operating conditions Symbol Parameter Test conditions Min. Typ. Max. Unit VPN Supply voltage Applied between P-Nu, Nv, Nw 300 500 V VCC Control supply voltage Applied between VCC- GND 12 15 17 V VBS High side bias voltage Applied between VBOOTi- OUTi for i = U, V, W 11.5 17 V tdead Blanking time to prevent Arm-short For each input signal 1.5 µs fPWM PWM input signal -40°C < Tc < 100°C -40°C < Tj < 125°C 25 kHz TC Case operation temperature 100 °C |
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