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33813 Fiches technique(PDF) 37 Page - Freescale Semiconductor, Inc |
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33813 Fiches technique(HTML) 37 Page - Freescale Semiconductor, Inc |
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37 / 54 page ![]() Analog Integrated Circuit Device Data Freescale Semiconductor 37 33813 Figure 18. 33813 Functional State Diagram 5.3.3 SLEEP State Sleep State is entered when the VBAT level signal is removed from the KEYSW pin and the PWREN SPI bit is a logic low. In Sleep state all outputs and current sources and sinks are off and the device consumes less than IVPWR(SS) µA. Applying a VBAT level to the KEYSW pin will force the device to exit the Sleep state and generate a POR. Table 14. Operational States KEYSW Input PWREN Input BATSW Output All Supplies STATE L L L OFF Sleep H L H ON NORMAL H H H ON NORMAL L H L ON Prepare to shutdown ActiveStates Passive States NORMAL RESET* RESETB=1 RESETB = 0 BATSW=1 ` SLEEP START RESETB=1 BATSW = 0 RESETB=1 VPWR_UV=1 READYTO OFF SHUT DOWN RESETB=1 BATSW = 0 PWREN=1 SPI_RESET* RESETB=1 UV = UnderVoltage OV = OverVoltage WD = Watch Dog TD = TimeDelay POR = PowerOn Reset &l i A *Configuration Registers resetto default, alloutputsoff & = logic AND ^=logic OR !=logic negation |
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