FXOS8700CQ datasheet(6/86 Pages) FREESCALE

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Freescale Semiconductor, Inc.

The function and timing of the two interrupt pins (INT1 and INT2) are user programmable through the I2C/SPI interface. The SDA

and SCL I2C connections are open drain and therefore require a pullup resistor as shown in the application diagram in Figure 3.

The INT1 and INT2 pins may also be configured for open-drain operation. If they are configured for open drain, external pullup

resistors are required.

Figure 3. Electrical connection

2.1

Soldering information

The QFN package is compliant with the RoHS standards. Please refer to Freescale application note AN4077 for more

information.

VDDIO

INT1

INT2

SDA/MOSI

SA0/MISO

RST

VDD

0.1

μF

0.1

μF

0.1

μF

4.7

μF

SCL/SCLK

SA1/CS_B

VDDIO

(Connect to GND if unused)

Note: Pullup resistors on INT1 and INT2 are not required if these

pins are configured for push/pull (default) operation.

0.1

μF

Note: Pullup resistors on SCL/SCLK and SDA/MOSI are not

required if the device is operated in SPI Interface mode.

BYP

SCL/SCLK

GND

Reserved

GND

Reserved

VDDIO

INT1

INT2

FXOS8700CQ

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