ICS9P935 datasheet(11/13 Pages) IDT

11 / 13 page

IDTTM/ICSTM

DDR I/DDR II Phase Lock Loop Zero Delay Buffer

ICS9P935

REV H

12/1/08

ICS9P935

DDR I/DDR II Phase Lock Loop Zero Delay Buffer

Ordering Information

ICS9P935yFLF-T

SEATING

PLANE

SEATING

PLANE

-C-

- C -

.10 (.004) C

INDEX

AREA

INDEX

AREA

1 2

209 mil SSOP

MIN

MAX

MIN

MAX

2.00

.079

0.05

.002

1.65

1.85

.065

.073

0.22

0.38

.009

.015

0.09

0.25

.0035

.010

7.40

8.20

.291

.323

5.00

5.60

.197

.220

0.55

0.95

.022

.037

0°

8°

0°

8°

VARIATIONS

MIN

MAX

MIN

MAX

9.90

10.50

.390

.413

10-0033

SYMBOL

In Millimeters

In Inches

COMMON DIMENSIONS COMMON DIMENSIONS

SEE VARIATIONS

0.65 BASIC

0.0256 BASIC

Reference Doc.: JEDEC Publication 95, MO-150

SEE VARIATIONS

D mm.

D (inch)

Example:

Designation for tape and reel packaging

RoHS Compliant (Optional)

Package Type

F = SSOP

Revision Designator (will not correlate with datasheet revision)

Device Type

Prefix

ICS = Standard Device

ICS XXXX y F LF- T

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