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HT16K33 Fiches technique(PDF) 21 Page - Holtek Semiconductor Inc |
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HT16K33 Fiches technique(HTML) 21 Page - Holtek Semiconductor Inc |
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21 / 47 page ![]() Rev. 1.10 18 �a� 1�� �011 Rev. 1.10 19 �a� 1�� �011 HT16K33 RAM Mapping 16*8 LED Controller Driver with keyscan Keyscan Timing The Slave addresses are updated on the keyscan timing as shown: KS0 KS1 KS2 Input mode COM1/KS0 COM2/KS1 COM3/KS2 ROW0~15 1 Cycle Key scan period Display period 1 Frame ∫∫ Slave address are updated Slave address are updated Slave address are updated AD KS0 KS1 Input mode 2 Cycle Key scan period Display period 1 Frame AD KS0 KS1 KS2 Input mode 3 Cycle Key scan period Display period 1 Frame Slave address are updated AD ∫∫ ∫∫ ∫∫ ∫∫ KS0 KS1 KS2 Input mode n Cycle Key scan period Display period 1 Frame AD COM0/AD KS2 Keyscan & INT Timing ● The key data is updated and the INT function is changed for keys that have been pressed after 2 key-cycles. ● The INT function is changed when the first key has been pressed. ● When after all the key data has been read that clears the key data RAM and the int flag bit is set to “0”, the INT pin goes to low when the “act” bit of the row/int set register is set to “1”. ● When after all the key data has been read that clears the key data RAM and the int flag bit is set to “0”, the INT pin goes to high when the “act” bit of the row/int setup register is set to “0”. ● The INT flag register is shown below. ● I2C bus display data transfer format INT flag register (address point at �0H) D7 D6 D5 D4 D3 D2 D1 D0 INT flag INT flag INT flag INT flag INT flag INT flag INT flag INT flag ● The relationship between keyscan signal to the INT signal time is shown below: 1. When a key is pressed on the KS0 row KS0 KS1 KS� Press ke� INT_flag 1 cycle 2 cycle INT pin (active low) INT pin (active high) |
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