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TESDM5V0A Fiches technique(PDF) 3 Page - Taiwan Semiconductor Company, Ltd |
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TESDM5V0A Fiches technique(HTML) 3 Page - Taiwan Semiconductor Company, Ltd |
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3 / 4 page ![]() TESDM5V0A Ultra Low Capacitance ESD Protection Array Small Signal Diode Application Information Typical Application Schematic Diagram for USB3.0 Protection RJ45 IEEE1394 Firewire Ports specifically designed to protect sensitive components which are connected to high-speed data and transmission lines from TESDM5V0A is ultra low capacitance ESD protection array designed to protect high speed data interfaces. This series has been Designed for protection of high-speed interfaces such as USB3.0 Ultra low capacitance between the pairs while being rated to handle >±8kV ESD contact discharges and >±15kV air discharge Applications for Microprocess based equipment Video Graphs Cards Digital Video Interface (DVI) High Definition Multi-Media Interface (HDMI) ATM Interfaces overvoltage caused by ESD, CDE (Cable Discharge Events), and EFT (electrical fast transients). Definition 1, 2, 3, 4, 5, 6 I/O Lines Pin 7 8 Ground Vcc 8 7 6 5 4 3 2 1 USB3.0 Controller D+ D- USB3_TX+ USB3_TX- USB3_RX+ USB3_RX- 8 7 6 5 4 3 2 1 Vcc Version : B10 |
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