L6726ATR datasheet(17/35 Pages) STMICROELECTRONICS

17 / 35 page

L6726A

Application details

Doc ID 12754 Rev 4

17/35

Type II compensation relies on the zero introduced by the output capacitors bank to achieve

stability. Thus, a needed condition to successfully apply type II compensation is

(usually true when output capacitor is based on electrolytic, aluminium electrolytic or

tantalum capacitor).

To define compensation network components values, the below suggestions may be

followed:

Set the output resistor divider in order to obtain the desired output voltage:

Usual values of RFB and ROS ranges from some hundreds of Ω to some kΩ

(consider trade-off between power dissipation on output resistor divider and offset

introduced by FB bias current).

If the desired output voltage is equal to internal reference, ROS has to be NC and

FB pin can be directly connected to VOUT.

Set RF in order to obtain the desired closed loop regulator bandwidth according to

the approximated formula:

If VOUT = VREF, just consider (RFB+ROS)/ROS factor equal to 1.

Place FZ below FLC (typically 0.2·FLC):

Place FP at 0.5·FSW:

Check that compensation network gain is lower than open loop transconductance

EA gain.

Estimate phase margin obtained (it should be greater than 45°) and repeat,

modifying parameters, if necessary.

ESR

0dB

-----------

OUT

REF

--------------

–

0dB

ESR

⋅

-------------------------------

ΔV

OSC

-------------------

--------

----------------------------

⋅⋅

⋅

π R

⋅⋅

---------------------------------

π R

–

⋅⋅

⋅

----------------------------------------------------

π R

⋅⋅

-------------------------------

≅

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