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PCA9564 Fiches technique(PDF) 17 Page - NXP Semiconductors

No de pièce PCA9564
Description  Parallel bus to I2C-bus controller
PDF  32 Pages
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Fabricant  PHILIPS [NXP Semiconductors]
Site Internet  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

PCA9564 Fiches technique(HTML) 17 Page - NXP Semiconductors

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Philips Semiconductors
Product data sheet
PCA9564
Parallel bus to I2C-bus controller
2006 Sep 01
17
I2C-BUS TIMING DIAGRAMS
The diagrams (Figures 9 to 12) illustrate typical timing diagrams for the PCA9564 in master/slave functions.
Master PCA9564 writes data to slave transmitter.
su01490
7-bit address
STOP
condition
first-byte
R/W = 0
interrupt
interrupt
interrupt
nbyte
ACK
ACK
ACK
from slave receiver
SCL
SDA
INT
START
condition
Figure 9. Bus timing diagram; master transmitter mode
su01491
Master PCA9564 reads data from slave transmitter.
7-bit address
STOP
condition
first-byte
R/W = 1
interrupt
interrupt
nbyte
ACK
ACK
no ACK
from slave
from master
receiver
SCL
SDA
INT
START
condition
Figure 10. Bus timing diagram; master receiver mode



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