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HT68F13 Fiches technique(PDF) 74 Page - Holtek Semiconductor Inc |
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HT68F13 Fiches technique(HTML) 74 Page - Holtek Semiconductor Inc |
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74 / 161 page ![]() HT68F13/HT68F14/HT68F15 Enhanced I/O Flash Type MCU Rev. 1.10 74 February 9, 2011 Counter Value CCRP CCRA TnON TnPAU TnPOL CCRP Int. Flag TnPF CCRA Int. Flag TnAF TM O/P Pin (TnOC=1) Time Counter cleared by CCRA Pause Resume Counter Stop if TnON bit low Counter Reset when TnON returns high TnDPX = 1; TnM [1:0] = 10 PWMDutyCycle set by CCRP PWM resumes operation Output controlled by other pin-shared function Output Inverts when TnPOL = 1 PWM Period set by CCRA TM O/P Pin (TnOC=0) PWM Mode -- TnDPX = 1 Note: 1. Here TnDPX=1-- Counter cleared by CCRA 2. A counter clear sets the PWM Period 3. The internal PWM function continues even when TnIO [1:0] = 00 or 01 4. The TnCCLR bit has no influence on PWM operation |
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