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PCIMX536AVV8B Fiches technique(PDF) 83 Page - Freescale Semiconductor, Inc |
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PCIMX536AVV8B Fiches technique(HTML) 83 Page - Freescale Semiconductor, Inc |
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83 / 180 page ![]() Electrical Characteristics i.MX53xA Automotive and Infotainment Applications Processors, Rev. 1 Freescale Semiconductor 83 4.7.8.4 IPU Display Interface Signal Mapping The IPU supports a number of display output video formats. Table 56 defines the mapping of the Display Interface Pins used during various supported video interface formats. Table 55. Sensor Interface Timing Characteristics ID Parameter Symbol Min Max Unit IP1 Sensor output (pixel) clock frequency Fpck 0.01 180 MHz IP2 Data and control setup time Tsu 2 — ns IP3 Data and control holdup time Thd 1 — ns |
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