MPC8544E datasheet(116/117 Pages) FREESCALE

116 / 117 page

MPC8544E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5

116

Freescale Semiconductor

Document Revision History

23 Document Revision History

Table 76 provides a revision history for the MPC8544E hardware specification.

Table 76. MPC8544E Document Revision History

Revision

Date

Substantive Change(s)

01/2011

• Updated Table 75.

09/2010

• Modified local bus information in Section 1.1, “Key Features,” to show max local bus frequency

as 133 MHz.

• Added footnote 28 to Table 62.

• Updated solder-ball parameter in Table 61.

11/2009

• Update Section 20.3.4, “Temperature Diode,”

• Update Table 61 Package Parameters from 95.5%sn to 96.5%sn

01/2009

• Update power number table to include 1067 MHz/533 MHz power numbers.

• Remove Part number tables from Hardware spec. The part numbers are available on Freescale

web site product page.

• Removed I/O power numbers from the Hardware spec. and added the table to bring-up guide

application note.

• Update tDDKHMP, tDDKHME in Table 18.

• Updated RX_CLK duty cycle min, and max value to meet the industry standard GMII duty cycle.

• Update paragraph Section 21.3, “Decoupling Recommendations.”

• Update Figure 5 DDR Output Timing Diagram.

•In Table 40, removed note 1 and renumbered remaining note.

• Update Section 22, “Device Nomenclature,” with regards to Commercial Tier.

06/2008

Update in Table 18 DDR SDRAM Output AC Timing Specifications tMCK Max value

Improvement to Section 16, “High-Speed Serial Interfaces (HSSI)

Update Figure 59 Mechanical Dimensions

Update in Table 48 Local Bus General Timing Parameters—PLL Bypassed

04/2008

Initial release.

MPC8544E Fiches technique(PDF) 116 Page - Freescale Semiconductor, Inc