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TLE4290 Fiches technique(PDF) 3 Page - Infineon Technologies AG |
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TLE4290 Fiches technique(HTML) 3 Page - Infineon Technologies AG |
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3 / 17 page ![]() TLE 4290 Data Sheet 3 Rev. 1.7, 2007-03-20 Figure 2 Pin Configuration (top view) Table 1 Pin Definitions and Functions Pin No. Symbol Function 1I Input; block to ground directly at the IC with a ceramic capacitor. 2PG Power Good; open collector output. Add a pull-up resistor of > 5 k Ω to pin Q. 3GND Ground; Pin 3 internally connected to heatsink. 4D Delay; connect a capacitor to GND for setting power good delay time. 5Q Output; block to ground with a capacitor, C ≥ 22 μF ESR < 5 Ω at 10 kHz. AEP02827 I PG Q D GND AEP02825 PG D Q I GND PG-TO263-5-1 PG-TO252-5-11 |
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