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ISL73096RHX/SAMPLE Fiches technique(PDF) 3 Page - Intersil Corporation |
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ISL73096RHX/SAMPLE Fiches technique(HTML) 3 Page - Intersil Corporation |
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3 / 4 page ![]() 3 Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted in the quality certifications found at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN6475.3 November 12, 2009 For additional products, see www.intersil.com/product_tree Die Characteristics DIE DIMENSIONS: 52.8 mils x 52.0 mils x 14 mils ±1 mil 1340μm x 1320µm x 355.6µm ±25.4µm INTERFACE MATERIALS: Glassivation: Type: Nitride Thickness: 4k Å ±0.5kÅ Top Metallization: Type: Metal 1: AlCu (2%)/TiW Thickness: Metal 1: 8k Å ±0.5kÅ Type: Metal 2: AlCu (2%) Thickness: Metal 2: 16k Å ±0.8kÅ Substrate: UHF-1X Bonded Wafer, DI Backside Finish: Silicon ASSEMBLY RELATED INFORMATION: Substrate Potential: Floating ADDITIONAL INFORMATION: Worst Case Current Density: 3.04 x 105A/cm2 Transistor Count: 5 Metallization Mask Layout FIGURE 1. ISL73096RH, ISL73127RH (1) Q1C (2) Q2C (3) Q2E (4) Q2B (5) NC (6) Q3C (7) Q3E (8) Q3B (9) Q4B(10) Q4E (11) Q4 (12) Q5 (13) Q5 (14) Q5 (15) Q1B (16) Q1E ISL73096RH, ISL73127RH, ISL73128RH |
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