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WM8711SEDS/R Fiches technique(PDF) 13 Page - Wolfson Microelectronics plc

No de pièce WM8711SEDS/R
Description  Internet Audio DAC with Integrated Headphone Amplifier
PDF  47 Pages
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Fabricant  WOLFSON [Wolfson Microelectronics plc]
Site Internet  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8711SEDS/R Fiches technique(HTML) 13 Page - Wolfson Microelectronics plc

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Production Data
WM8711 / WM8711L
w
PD Rev 4.4 April 2007
13
MASTER CLOCK TIMING
MCLK
t
XTIL
t
XTIH
t
XTIY
Figure 1 System Clock Timing Requirements
Test Conditions
AVDD, HPVDD, DBVDD = 3.3V, AGND = 0V, DCVDD = 1.5V, DGND = 0V, TA = +25
oC, Slave Mode fs = 48kHz, MCLK = 256fs
unless otherwise stated.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
System Clock Timing Information
MCLK System clock pulse width
high
tXTIH
18
ns
MCLK System clock pulse width
low
tXTIL
18
ns
MCLK System clock cycle time
tXTIY
54
ns
MCLK Duty cycle
40:60
60:40
DIGITAL AUDIO INTERFACE – MASTER MODE
BCLK
(Output)
DACLRC
(Output)
DACDAT
t
DLT
t
DHT
t
DL
Figure 2 Digital Audio Data Timing - Master Mode
Test Conditions
AVDD, HPVDD, DVDD = 3.3V, AGND = 0V, DCVDD = 1.5V, DGND = 0V, TA = +25
oC, Slave Mode, fs = 48kHz, XTI/MCLK =
256fs unless otherwise stated.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Audio Data Input Timing Information
DACLRC propagation delay
from BCLK falling edge
tDL
0
10
ns
DACDAT setup time to
BCLCK rising edge
tDST
10
ns
DACDAT hold time from
BCLK rising edge
tDHT
10
ns



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