151 datasheet(90/121 Pages) RENESAS

90 / 121 page

REJ03B0230-0110

Rev.1.10

Page 90 of 116

Sep 06, 2010

R32C/151 Group

5. Electrical Characteristics

Timing Requirements (VCC = 3.0 to 5.5 V, VSS = 0 V, and Ta = Topr, unless otherwise noted)

Figure 5.5

Flash Memory CPU Rewrite Mode Timing

Table 5.15

Flash Memory CPU Rewrite Mode Timing

Symbol

Characteristics

Value

Unit

Min.

Max.

tcR

Read cycle time

200

tsu(S-R)

Chip-select setup time for read

200

th(R-S)

Chip-select hold time after read

0ns

tsu(A-R)

Address setup time for read

200

th(R-A)

Address hold time after read

0ns

tw(R)

Read pulse width

100

tcW

Write cycle time

200

tsu(S-W)

Chip-select setup time for write

0ns

th(W-S)

Chip-select hold time after write

tsu(A-W)

Address setup time for write

0ns

th(W-A)

Address hold time after write

tw(W)

Write pulse width

Chip select

Address

t h(R-S)

Read cycle

t w(R)

t su(S-R)

t h(R-A)

t su(A-R)

Write cycle

Chip select

Address

t h(W-S)

t w(W)

t su(S-W)

t h(W-A)

t su(A-W)

t cW

t cR

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