AD9550SLASHPCBZ datasheet(18/20 Pages) AD

No de pièce	AD9550/PCBZ

Description	Integer-N Clock Translator for Wireline Communications

PDF	20 Pages

Scroll/Zoom	100%

Fabricant	AD [Analog Devices]

Site Internet	http://www.analog.com

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18 / 20 page

AD9550

Rev. 0 | Page 18 of 20

OUTLINE DIMENSIONS

COMPLIANT TO JEDEC STANDARDS MO-220-WHHD.

0.50

BSC

BOTTOM VIEW

TOP VIEW

PIN 1

INDICATOR

EXPOSED

PAD

PIN 1

INDICATOR

3.25

3.10 SQ

2.95

SEATING

PLANE

0.05 MAX

0.02 NOM

0.20 REF

COPLANARITY

0.08

0.30

0.25

0.18

5.10

5.00 SQ

4.90

0.80

0.75

0.70

FOR PROPER CONNECTION OF

THE EXPOSED PAD, REFER TO

THE PIN CONFIGURATION AND

FUNCTION DESCRIPTIONS

SECTION OF THIS DATA SHEET.

0.50

0.40

0.30

0.25 MIN

Figure 27. 32-Lead Lead Frame Chip Scale Package [LFCSP_WQ]

5 mm × 5 mm Body, Very, Very Thin Quad

(CP-32-7)

Dimensions shown in millimeters

ORDERING GUIDE

Model1

Temperature Range

Package Description

Package Option

AD9550BCPZ

−40°C to +85°C

32-Lead Lead Frame Chip Scale Package [LFCSP_WQ]

CP-32-7

AD9550BCPZ-REEL7

−40°C to +85°C

32-Lead Lead Frame Chip Scale Package [LFCSP_WQ]

CP-32-7

AD9550/PCBZ

Evaluation Board

1 Z = RoHS Compliant Part.

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