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SN74LVC08ADBLE Fiches technique(PDF) 4 Page - Texas Instruments

No de pièce SN74LVC08ADBLE
Description  QUADRUPLE 2-INPUT POSITIVE-AND GATES
PDF  24 Pages
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Fabricant  TI [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI - Texas Instruments

SN74LVC08ADBLE Fiches technique(HTML) 4 Page - Texas Instruments

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Recommended Operating Conditions
(1)
Recommended Operating Conditions
(1)
SN54LVC08A, SN74LVC08A
QUADRUPLE 2-INPUT POSITIVE-AND GATES
SCAS283P – JANUARY 1993 – REVISED AUGUST 2005
SN54LVC08A
–55
°C to 125°C
UNIT
MIN
MAX
Operating
2
3.6
VCC
Supply voltage
V
Data retention only
1.5
VIH
High-level input voltage
VCC = 2.7 V to 3.6 V
2
V
VIL
Low-level input voltage
VCC = 2.7 V to 3.6 V
0.8
V
VI
Input voltage
0
5.5
V
VO
Output voltage
0
VCC
V
VCC = 2.7 V
–12
IOH
High-level output current
mA
VCC = 3 V
–24
VCC = 2.7 V
12
IOL
Low-level output current
mA
VCC = 3 V
24
∆t/∆v
Input transition rise or fall rate
8
ns/V
(1)
All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
SN74LVC08A
TA = 25°C
–40
°C to 85°C
–40
°C to 125°C
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
Operating
1.65
3.6
1.65
3.6
1.65
3.6
VCC
Supply voltage
V
Data retention only
1.5
1.5
1.5
VCC = 1.65 V to 1.95 V
0.65
× V
CC
0.65
× V
CC
0.65
× V
CC
High-level
VIH
VCC = 2.3 V to 2.7 V
1.7
1.7
1.7
V
input voltage
VCC = 2.7 V to 3.6 V
2
2
2
VCC = 1.65 V to 1.95 V
0.35
× V
CC
0.35
× V
CC
0.35
× V
CC
Low-level
VIL
VCC = 2.3 V to 2.7 V
0.7
0.7
0.7
V
input voltage
VCC = 2.7 V to 3.6 V
0.8
0.8
0.8
VI
Input voltage
0
5.5
0
5.5
0
5.5
V
VO
Output voltage
0
VCC
0
VCC
0
VCC
V
VCC = 1.65 V
–4
–4
–4
VCC = 2.3 V
–8
–8
–8
High-level
IOH
mA
output current
VCC = 2.7 V
–12
–12
–12
VCC = 3 V
–24
–24
–24
VCC = 1.65 V
4
4
4
VCC = 2.3 V
8
8
8
Low-level
IOL
mA
output current
VCC = 2.7 V
12
12
12
VCC = 3 V
24
24
24
∆t/∆v Input transition rise or fall rate
8
8
8
ns/V
(1)
All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
4



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