TUSB1106 datasheet(12/33 Pages) TI

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Dynamic Electrical Characteristics for Analog I/O Pins (D+, D–)

(1)

Dynamic Electrical Characteristics for Analog I/O Pins (D+, D–)

(1)

MGS96 3

10%

90%

10%

VOL

VOH

tFR,tLR

tFF,tLF

MG S96 6

Logic Input

Differential

Data Lines

1.8 V

0 V

VOH

VOL

0.9 V

VOL + 0.3 V

VOH − 0.3 V

VCRS

tPZH

tPZL

tPHZ

tPLZ

MGS9 64

VOL

Logic Output

VOH

Differential

Data Lines

0.9 V

VCRS

1.8 V

0 V

tPLH(drv)

tPHL(drv)

0.9 V

MGS965

VOL

Logic Output

VOH

0.8 V

Differential

Data Lines

2.0 V

VCRS

0.9 V

VCRS

tPLH(rcv)

tPLH(se)

tPHL(rcv)

tPHL(se)

TUSB1105, TUSB1106

ADVANCED UNIVERSAL SERIAL BUS TRANSCEIVERS

SCAS818D – MAY 2006 – REVISED FEBRUARY 2008

Receiver Timing, Full-Speed and Low-Speed Mode, Differential Receiver

over recommended ranges of operating free-air temperature and supply voltage, VCC = 4 V to 5.5 V or Vreg(3.3) = 3 V to 3.6 V,

VCC(I/O) = 1.65 V to 3.6 V, VGND = 0 V, see Table 10 for valid voltage level combinations, TA = –40°C to 85°C

(unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

MAX

UNIT

tPLH(rcv)

LOW to HIGH (see Figure 3)

Propagation delay (D+, D– to RCV)

tPHL(rcv)

HIGH to LOW (see Figure 3)

(1)

Test circuit, see Figure 13

Receiver Timing, Full-Speed and Low-Speed Mode, Single-Ended Receiver

over recommended ranges of operating free-air temperature and supply voltage, VCC = 4 V to 5.5 V or Vreg(3.3) = 3 V to 3.6 V,

VCC(I/O) = 1.65 V to 3.6 V, VGND = 0 V, see Table 10 for valid voltage level combinations, TA = –40°C to 85°C

(unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

MAX

UNIT

tPLH(se)

LOW to HIGH (see Figure 3)

Propagation delay (D+, D– to VP, VM)

tPHL(se)

HIGH to LOW (see Figure 3)

(1)

Test circuit, see Figure 13

Figure 1. Rise and Fall Times

Figure 2. OE to D+, D–

Figure 3. D+, D– to RCV, VP, VM

Figure 4. VO/VPO, FSE0/VMO to D+, D–

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