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PCM4104IPFBREP Fiches technique(PDF) 22 Page - Texas Instruments |
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PCM4104IPFBREP Fiches technique(HTML) 22 Page - Texas Instruments |
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22 / 43 page ![]() www.ti.com System Clock SUB SUB PCM4104 PCM4104 Device #1 (Sub−Frame 0) Device #2 (Sub−Frame 1) SCKI V CC FSX CLKX DX LRCK BCK DATA0 LRCK BCK DATA0 DSP SCKI LRCK Normal, Zero BCK Delay LRCK Normal, One BCK Delay LRCK Inverted, Zero BCK Delay LRCK Inverted, One BCK Delay DATA0 Supports 8 Channels, or two PCM4104 devices. Slot 1 Slot 2 Slot 3 Slot 4 Slot 5 Slot 6 Slot 7 Slot 8 Ch. 1 Ch. 2 Ch. 3 Ch. 4 Ch. 1 Ch. 2 Ch. 3 Ch. 4 Sub−Frame 0 (SUB = 0) Sub−Frame 1 (SUB = 1) One Frame BCK = 192f S or 256fS In the case of BCK = 192f S, each time slot is 24 bits long and contains the 24−bit audio data for the corresponding channel. In the case of BCK = 256f S, each time slot is 32 bits long and contains the 24−bit audio data for the corresponding channel. The audio data is left justified in the time slot, with the the least significant 8 bits of each time slot being don’t care bits. Audio data is always presented in two’s complement, MSB−first format. TDM Data Formats − Long Frame Supported for Single and Dual Rate Sampling Modes Only PCM4104-EP SBAS419 – JUNE 2007 Figure 12. TDM Connection Figure 13. TDM Data Formats: Long Frame 22 Submit Documentation Feedback |
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