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PIC16F707T-E/ML Fiches technique(PDF) 32 Page - Microchip Technology |
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PIC16F707T-E/ML Fiches technique(HTML) 32 Page - Microchip Technology |
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32 / 284 page ![]() PIC16F707/PIC16LF707 DS41418A-page 32 Preliminary 2010 Microchip Technology Inc. 3.4.2 WDT CONTROL The WDTE bit is located in the Configuration Word Register 1. When set, the WDT runs continuously. The PSA and PS<2:0> bits of the OPTION register control the WDT period. See Section 12.0 “Timer0 Module” for more information. FIGURE 3-3: WATCHDOG TIMER BLOCK DIAGRAM From TMR0 Postscaler 8 PS<2:0> PSA TO TMR0 1 1 0 0 Clock Source To TxG Divide by 512 WDTE TMRxGE TxGSS = 11 WDTE WDT Reset Low-Power WDT OSC TABLE 3-3: WDT STATUS Conditions WDT WDTE = 0 Cleared CLRWDT Command Exit Sleep + System Clock = EXTRC, INTOSC, EXTCLK Exit Sleep + System Clock = XT, HS, LP Cleared until the end of OST |
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