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MCP73113 Fiches technique(PDF) 23 Page - Microchip Technology |
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MCP73113 Fiches technique(HTML) 23 Page - Microchip Technology |
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23 / 34 page ![]() © 2010 Microchip Technology Inc. DS22183C-page 23 MCP73113/4 6.2 PCB Layout Issues For optimum voltage regulation, place the battery pack as close as possible to the device’s VBAT and VSS pins, recommended to minimize voltage drops along the high current-carrying PCB traces. If the PCB layout is used as a heatsink, adding many vias in the heatsink pad can help conduct more heat to the backplane of the PCB, thus reducing the maximum junction temperature. Figure 6-4 and Figure 6-5 depict a typical layout with PCB heatsinking. FIGURE 6-3: Typical Layout (Top). FIGURE 6-4: Typical Layout (Top Metal). FIGURE 6-5: Typical Layout (Bottom). |
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