P89LPC985FDH datasheet(68/85 Pages) NXP

68 / 85 page

P89LPC980_982_983_985_2

Preliminary data sheet

Rev. 02 — 8 February 2010

68 of 85

NXP Semiconductors

P89LPC980/982/983/985

8-bit microcontroller with accelerated two-clock 80C51 core

[1]

Typical ratings are not guaranteed. The values listed are at room temperature, 3 V.

[2]

The IDD(oper) and IDD(idle) specifications are measured using an external clock with the following functions disabled: comparators,

real-time clock, and watchdog timer.

[3]

The IDD(pd) and IDD(tpd) specification is measured using an external clock with the following functions disabled: comparators, real-time

clock, brownout detect, and watchdog timer.

[4]

See Section 9 “Limiting values” for steady state (non-transient) limits on IOL or IOH. If IOL/IOH exceeds the test condition, VOL/VOH may

exceed the related specification.

[5]

This specification can be applied to pins which have A/D input or analog comparator input functions when the pin is not being used for

those analog functions. When the pin is being used as an analog input pin, the maximum voltage on the pin must be limited to 4.0 V with

respect to VSS.

[6]

Pin capacitance is characterized but not tested.

[7]

Measured with port in quasi-bidirectional mode.

[8]

Measured with port in high-impedance mode.

[9]

Port pins source a transition current when used in quasi-bidirectional mode and externally driven from logic 1 to logic 0. This current is

highest when VI is approximately 2 V.

BOD reset

Vtrip

trip voltage

falling stage

BOE2, BOE1, BOE0 = 010

2.25

BOE2, BOE1, BOE0 = 011

2.55

BOE2, BOE1, BOE0 = 100

2.85

BOE2, BOE1, BOE0 = 101

3.15

BOE2, BOE1, BOE0 = 110

3.85

BOE2, BOE1, BOE0 = 111

4.05

rising stage

BOE2, BOE1, BOE0 = 010

2.40

BOE2, BOE1, BOE0 = 011

2.70

BOE2, BOE1, BOE0 = 100

3.00

BOE2, BOE1, BOE0 = 101

3.30

BOE2, BOE1, BOE0 = 110

4.00

BOE2, BOE1, BOE0 = 111

4.20

BOD flash

Vtrip

trip voltage

falling stage

2.30

2.55

rising stage

2.40

2.65

Vref(bg)

band gap reference

voltage

1.19

1.23

1.27

TCbg

band gap

temperature

coefficient

ppm/

°C

Table 13.

Static characteristics …continued

VDD = 2.4 V to 5.5 V unless otherwise specified.

Tamb = −40 °Cto+85 °C for industrial applications, unless otherwise specified.

Symbol

Parameter

Conditions

Min

Typ[1]

Max

Unit

P89LPC985FDH Fiches technique(PDF) 68 Page - NXP Semiconductors

P89LPC985FDH Fiches technique(HTML) 68 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85

Fiches technique Télécharger

Lien URL