ADIS16135

Rev. 0 | Page 6 of 20

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

11

12

13

14

15

16

17

18

19

20

21

22

23

24

9

10

7

8

5

6

3

4

1

2

ADIS16135

TOP VIEW

NOTES

1. PINS ARE NOT VISIBLE FROM THIS VIEW. THE PIN ASSIGNMENTS

SHOWN REPRESENT THE MATING CONNECTOR ASSIGNMENTS.

Figure 5. Mating Connector Pin Assignments

RATE

AXIS

POSITIVE

ROTATION

DIRECTION

+

Figure 6. Axial Orientation (Bottom Side Facing Up)

Table 5. Pin Function Descriptions

Pin No.

Mnemonic

Type1

Description

2

CLKIN

I

Clock Input, SMPL_PRD = 0x0000

3

SCLK

I

SPI Serial Clock.

4

DOUT

O

SPI Data Output. Clocks output on SCLK falling edge.

5

DIN

I

SPI Data Input. Clocks input on SCLK rising edge.

6

CS

I

SPI Chip Select.

7

DIO1

I/O

Configurable Digital Input/Output.

8

RST

I

Reset.

9

DIO2

I/O

Configurable Digital Input/Output.

10, 11, 12

VCC

S

Power Supply.

13, 14, 15

GND

S

Power Ground.

1, 16 to 24

DNC

N/A

Do Not Connect.

1

I/O is input/output, I is input, O is output, S is supply, N/A is not applicable.