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WM8191 Fiches technique(PDF) 21 Page - Wolfson Microelectronics plc

No de pièce WM8191
Description  14-bit 6MSPS CIS/CCD Analogue Front End/Digitiser
PDF  27 Pages
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Fabricant  WOLFSON [Wolfson Microelectronics plc]
Site Internet  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8191 Fiches technique(HTML) 21 Page - Wolfson Microelectronics plc

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Advanced Information
WM8191
WOLFSON MICROELECTRONICS LTD
AI Rev 3.1 April 2001
21
OPERATING MODE TIMING DIAGRAMS
The following diagrams show 14-bit parallel format output and MCLK, VSMP and input video
requirements for operation of the most commonly used modes as shown in Table 5. The diagrams
are identical for both CDS and non-CDS operation. Outputs from RINP, GINP and BINP are shown
as R, G and B respectively. X denotes invalid data.
MCLK
VSMP
INPUT VIDEO
OP[13:0] (DEL = 00)
OP[13:0] (DEL = 01)
OP[13:0] (DEL = 10)
OP[13:0] (DEL = 11)
16.5 MCLK PERIODS
G
B
R
G
B
R
G
R
B
R
B
G
R
R
G
B
R
G
B
R
B
G
B
G
R
B
R
B
R
G
B
R
G
B
G
R
G
R
B
G
B
R
G
B
R
G
B
R
G
R
B
R
B
G
R
G
B
G
G
B
Figure 20 Mode 1 Operation
16.5 MCLK PERIODS
MCLK
VSMP
INPUT VIDEO
OP[13:0] (DEL = 00)
OP[13:0] (DEL = 01)
OP[13:0] (DEL = 10)
OP[13:0] (DEL = 11)
X
X
R
X
X
R
X
R
X
R
X
X
R
R
X
X
R
X
X
R
X
X
X
X
R
X
X
R
X
X
R
X
X
X
R
X
R
X
X
X
X
R
X
X
R
X
R
X
R
X
X
R
Figure 21 Mode 2 Operation
MCLK
VSMP
OP[13:0] (DEL = 00)
INPUT VIDEO
OP[13:0] (DEL = 01)
OP[13:0] (DEL = 10)
OP[13:0] (DEL = 11)
23.5 MCLK PERIODS
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Figure 22 Mode 3 Operation



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