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WM8170 Fiches technique(PDF) 11 Page - Wolfson Microelectronics plc |
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WM8170 Fiches technique(HTML) 11 Page - Wolfson Microelectronics plc |
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11 / 41 page ![]() WM8170 Product Preview Rev 1.0 WOLFSON MICROELECTRONICS LTD PP Rev 1.0 March 2000 11 PARALLEL INTERFACE t STB STB D[9:2] DNA RNW ADC DATA OUT DATA OUT ADC DATA OUT DATA IN ADDRESS IN ADC DATA OUT t OPD t OPZ t ASU t AH t DSU t DH t STDO t STAO t ADHH t ADLS t ADLH t ADHS Z Z Figure 6 Parallel Interface Timing Diagram Test Characteristics CVDD = AVDD = DVDD = 3.3V, AGND = DGND = CGND = 0V, RISET=15k Ω , TA = 0oC to +70oC, unless otherwise stated. PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT RNW low to OP[9:2] Tri- state tOPZ 20 ns Address setup time to STB low tASU 0 ns DNA low setup time to STB low tADLS 10 ns STB low time tSTB 50 ns Address hold time from STB high tAH 10 ns DNA low hold time from STB high tADLH 10 ns Data setup time to STB low tDSU 0 ns DNA high setup time to STB low tADHS 10 ns Data hold time from STB high tDH 10 ns DNA high hold time from STB high tADHH 10 ns RNW high to OP[9:2] output tOPD 0 ns Data output propagation delay from STB low tSTDO ns ADC data out propagation delay from STB high tSTAO ns |
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