AS1530_1 datasheet(25/29 Pages) AMSCO

No de pièce	AS1530

Description	12-Bit, Single-Supply, Low-Power, 400/300ksps, 8-Channel A/D Converters

PDF	29 Pages

Scroll/Zoom	100%

Fabricant	AMSCO [ams AG]

Site Internet	http://www.ams.com

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AS1530/AS1531

Data Sheet - Ap p lica tio n In fo r m a tio n

Quick Evaluation Circuit

In order to quickly evaluate the analog performance of the AS1530/AS1531, use the circuit shown in Figure 35.

Figure 35. Evaluation Circuit Diagram

Connecting DIN to VDD2 shifts in control bytes of $FFh, which trigger single-ended conversions (bit RANGE (page 15)

= 1) on CH7 without powering down between conversions. The SSTRB output pulses high for one clock period before

the MSB of the 12-bit conversion result is shifted out of DOUT. Varying the analog input to CH7 will alter the sequence

of bits from DOUT. A total of 16 clock cycles is required per conversion.

Note:

All SSTRB and DOUT output transitions occur 25ns (typ) after the rising edge of SCLK.

+2.5V

Analog

Input

0.1µF

REFADJ

REF

4.7µF

GND

CSN

DOUT

SSTRB

SCLK

DIN

0.1µF

VDD2

0.1µF

10µF

+3 or

+5V

External

Clock

CH7

AS1530/

AS1531

TBA

VDD1

VDD2

VDD3

COM

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