MPC8544EBVTALF datasheet(20/120 Pages) FREESCALE

No de pièce	MPC8544EBVTALF

Description	PowerQUICC??III Integrated Processor Hardware Specifications

PDF	120 Pages

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Fabricant	FREESCALE [Freescale Semiconductor, Inc]

Site Internet	http://www.freescale.com

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MPC8544E PowerQUICC™ III Integrated Processor Hardware Specifications, Rev. 3

Freescale Semiconductor

DDR and DDR2 SDRAM

Figure 3 shows the DDR SDRAM input timing diagram.

Figure 3. DDR SDRAM Input Timing Diagram (tDISKEW)

6.2.2

DDR SDRAM Output AC Timing Specifications

Table 18 provides the output AC timing specifications for the DDR SDRAM interface.

Table 18. DDR SDRAM Output AC Timing Specifications

At recommended operating conditions.

Parameter

Symbol1

Min

Max

Unit

Notes

MCK[n] cycle time, MCK[n]/MCK[n] crossing

tMCK

3.75

ADDR/CMD output setup with respect to MCK

tDDKHAS

533 MHz

400 MHz

333 MHz

1.48

1.95

2.40

—

ADDR/CMD output hold with respect to MCK

tDDKHAX

533 MHz

400 MHz

333 MHz

1.48

1.95

2.40

—

MCS[n] output setup with respect to MCK

tDDKHCS

533 MHz

400 MHz

333 MHz

1.48

1.95

2.40

—

MCS[n] output hold with respect to MCK

tDDKHCX

533 MHz

400 MHz

333 MHz

1.48

1.95

2.40

—

MCK to MDQS Skew

tDDKHMH

–0.6

0.6

MCK[n]

tMCK

MDQ[x]

MDQS[n]

tDISKEW

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