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ATmega328P Fiches technique(PDF) 44 Page - ATMEL Corporation

No de pièce ATmega328P
Description  8-bit Microcontroller with 4/8/16/32K Bytes In-System Programmable Flash
PDF  448 Pages
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Fabricant  ATMEL [ATMEL Corporation]
Site Internet  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

ATmega328P Fiches technique(HTML) 44 Page - ATMEL Corporation

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44
8161D–AVR–10/09
ATmega48PA/88PA/168PA/328P
9.11
Register Description
9.11.1
SMCR – Sleep Mode Control Register
The Sleep Mode Control Register contains control bits for power management.
• Bits 7..4 Res: Reserved Bits
These bits are unused in the ATmega48PA/88PA/168PA/328P, and will always be read as zero.
• Bits 3..1 – SM2..0: Sleep Mode Select Bits 2, 1, and 0
These bits select between the five available sleep modes as shown in Table 9-2.
Note:
1. Standby mode is only recommended for use with external crystals or resonators.
• Bit 0 – SE: Sleep Enable
The SE bit must be written to logic one to make the MCU enter the sleep mode when the SLEEP
instruction is executed. To avoid the MCU entering the sleep mode unless it is the programmer’s
purpose, it is recommended to write the Sleep Enable (SE) bit to one just before the execution of
the SLEEP instruction and to clear it immediately after waking up.
9.11.2
MCUCR – MCU Control Register
• Bit 6 – BODS: BOD Sleep
The BODS bit must be written to logic one in order to turn off BOD during sleep, see Table 9-1
on page 39. Writing to the BODS bit is controlled by a timed sequence and an enable bit,
BODSE in MCUCR. To disable BOD in relevant sleep modes, both BODS and BODSE must first
Bit
7
654
32
10
0x33 (0x53)
–
–
–
–
SM2
SM1
SM0
SE
SMCR
Read/Write
R
R
R
R
R/W
R/W
R/W
R/W
Initial Value
0
0
0
0
0
0
0
0
Table 9-2.
Sleep Mode Select
SM2
SM1
SM0
Sleep Mode
00
0
Idle
0
0
1
ADC Noise Reduction
0
1
0
Power-down
0
1
1
Power-save
10
0
Reserved
10
1
Reserved
1
1
0
Standby(1)
1
1
1
External Standby(1)
Bit
7
6
5
4
3
2
1
0
0x35 (0x55)
–
BODS
BODSE
PUD
–
–
IVSEL
IVCE
MCUCR
Read/Write
R
R
R
R/W
R
R
R/W
R/W
Initial Value
0
0
0
0
0
0
0
0



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