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BUJD103AD Fiches technique(PDF) 3 Page - NXP Semiconductors |
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BUJD103AD Fiches technique(HTML) 3 Page - NXP Semiconductors |
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3 / 14 page ![]() BUJD103AD_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 6 October 2009 3 of 14 NXP Semiconductors BUJD103AD NPN power transistor with integrated diode Fig 1. Test circuit for reverse bias safe operating area Fig 2. Reverse bias safe operating area Fig 3. Forward bias safe operating area for Tmb ≤ 25 °C 001aab999 DUT LC LB IBon VBB VCC VCL(CE) probe point VCEclamp (V) 0 1000 800 400 600 200 001aac000 4 6 2 8 10 IC (A) 0 001aac001 10−1 10−2 10 1 102 IC (A) 10−3 VCEclamp (V) 1 103 102 10 (1) 100 μs 200 μs I(3) tp = 20 μs duty cycle = 0.01 50 μs 500 μs DC II(3) III(3) (2) ICM(max) IC(max) |
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