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25LC080C Fiches technique(PDF) 10 Page - Microchip Technology

No de pièce 25LC080C
Description  8K SPI Bus Serial EEPROM
PDF  28 Pages
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Fabricant  MICROCHIP [Microchip Technology]
Site Internet  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

25LC080C Fiches technique(HTML) 10 Page - Microchip Technology

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25XX080C/D
DS22151A-page 10
© 2009 Microchip Technology Inc.
2.5
Read Status Register (RDSR)
Instruction
The Read Status Register (RDSR) instruction provides
access to the STATUS register. The STATUS register
may be read at any time, even during a write cycle. The
STATUS register is formatted as follows:
TABLE 2-2:
STATUS REGISTER
The Write-In-Process (WIP) bit indicates whether the
25XX080C/D is busy with a write operation. When set
to a ‘1’, a write is in progress, when set to a ‘0’, no write
is in progress. This bit is read-only.
The Write Enable Latch (WEL) bit indicates the status
of the write enable latch and is read only. When set to
a ‘1’, the latch allows writes to the array or the STATUS
register, when set to a ‘0’, the latch prohibits writes to
the array or the STATUS register. The state of this bit
can always be updated via the WREN or WRDI com-
mands regardless of the state of write protection on the
STATUS register. These commands are shown in
Figure 2-4 and Figure 2-5.
The Block Protection (BP0 and BP1) bits indicate
which blocks are currently write-protected. These bits
are set by the user issuing the WRSR instruction, which
is in Figure 2-7. These bits are nonvolatile and are
shown in Table 2-3.
See Figure 2-6 for the RDSR timing sequence.
FIGURE 2-6:
READ STATUS REGISTER TIMING SEQUENCE (RDSR)
7
654
3
2
1
0
W/R
–––
W/R
W/R
R
R
WPEN
X
X
X
BP1
BP0
WEL
WIP
W/R = writable/readable. R = read-only.
SO
SI
CS
9
1011
12131415
11
0
0
0
0
00
76
5
4
2
1
0
Instruction
Data from STATUS Register
High-Impedance
SCK
0
2
34
56
7
1
8
3



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