MCP651 datasheet(6/44 Pages) MICROCHIP

6 / 44 page

MCP651/2/5

DS22146A-page 6

1.3

Timing Diagram

FIGURE 1-1:

Timing Diagram.

1.4

Test Circuits

The circuit used for most DC and AC tests is shown in

Figure 1-2. This circuit can independently set VCM and

VOUT; see Equation 1-1. Note that VCM is not the

circuit’s common mode voltage ((VP +VM)/2), and that

VOST includes VOS plus the effects (on the input offset

error, VOST) of temperature, CMRR, PSRR and AOL.

EQUATION 1-1:

FIGURE 1-2:

AC and DC Test Circuit for

Most Specifications.

Thermal Resistance, 10L-3×3 DFN

θJA

—71—

°C/W

(Note 2)

Thermal Resistance, 10L-MSOP

θJA

—

202

—

°C/W

TABLE 1-4:

TEMPERATURE SPECIFICATIONS

Electrical Characteristics: Unless otherwise indicated, all limits are specified for: VDD = +2.5V to +5.5V, VSS = GND.

Parameters

Sym

Min

Typ

Max

Units

Conditions

Note 1:

Operation must not cause TJ to exceed Maximum Junction Temperature specification (150°C).

Measured on a standard JC51-7, four layer printed circuit board with ground plane and vias.

High-Z

VDD

VOUT

-3 µA (typical)

High-Z

ISS

ICS

-3 µA (typical)

-6 mA (typical)

VPRH

VPRL

tPON

tPOFF

0nA(typical)

High-Z

-3 µA (typical)

-6 mA (typical)

tCOFF

tCON

0.7 µA (typical)

0nA(typical)

CAL/CS

VIH

VIL

tCSU

GDM

RF RG

⁄

VCM

VP VDD 2

⁄

() 2

⁄

VOUT

VDD 2

⁄

()

VP VM

–

() V

OST 1

GDM

()

Where:

GDM = Differential Mode Gain

(V/V)

VCM = Op Amp’s Common Mode

Input Voltage

(V)

VOST = Op Amp’s Total Input Offset

Voltage

(mV)

VOST

VIN– VIN+

–

VDD

MCP65X

VOUT

CB2

CB1

10 k

VDD/2

10 k

20 pF

2.2 µF

100 nF

VIN–

VIN+

6.8 pF

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