MCP6L1RT datasheet(11/32 Pages) MICROCHIP

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DS22135A-page 11

MCP6L1/1R/2/4

4.0

APPLICATION INFORMATION

The MCP6L1/1R/2/4 family of op amps is manufac-

tured using Microchip’s state of the art CMOS process.

They are unity-gain stable and suitable for a wide range

of general purpose applications.

4.1

Inputs

4.1.1

PHASE REVERSAL

The MCP6L1/1R/2/4 op amps are designed to prevent

phase inversion when the input pins exceed the supply

voltages. Figure 2-10 shows an input voltage exceed-

ing both supplies without any phase reversal.

4.1.2

INPUT VOLTAGE AND CURRENT

LIMITS

In order to prevent damage and/or improper operation

of these amplifiers, the circuit they are in must limit the

currents (and voltages) at the input pins (see

Section 1.1

“Absolute

Maximum

Ratings †”).

Figure 4-1 shows the recommended approach to

protecting these inputs. The internal ESD diodes

prevent the input pins (VIN+ and VIN–) from going too

far below ground, and the resistors R1 and R2 limit the

possible current drawn out of the input pins. Diodes D1

and D2 prevent the input pins (VIN+ and VIN–) from

going too far above VDD, and dump any currents onto

VDD.

FIGURE 4-1:

Protecting the Analog

Inputs.

A significant amount of current can flow out of the

inputs (through the ESD diodes) when the common

mode voltage (VCM) is below ground (VSS); see

Figure 2-7. Applications that are high impedance may

need to limit the usable voltage range.

4.1.3

NORMAL OPERATION

The Common Mode Input Voltage Range (VCMR)

includes ground in single-supply systems (VSS), but

does not include VDD. This means that the amplifier

input behaves linearly as long as the Common Mode

Input Voltage (VCM) is kept within the VCMR limits (typ-

ically VSS – 0.3V to VDD –1.2V at +25°C).

Figure 4-3 shows a unity gain buffer. Since VOUT is the

same voltage as the inverting input, VOUT must be kept

below VDD – 1.2V (typically) for correct operation.

FIGURE 4-2:

Unity Gain Buffer has a

Limited VOUT Range.

4.2

Rail-to-Rail Output

The output voltage range of the MCP6L1/1R/2/4 op

amps is VDD – 35 mV (minimum) and VSS +35mV

(maximum) when RL =10kΩ is connected to VDD/2

and VDD = 5.0V. Refer to Figure 2-13 for more informa-

tion.

4.3

Capacitive Loads

Driving large capacitive loads can cause stability

problems for voltage feedback op amps. As the load

capacitance increases, the feedback loop’s phase

margin decreases and the closed-loop bandwidth is

reduced. This produces gain peaking in the frequency

response, with overshoot and ringing in the step

response.

When driving large capacitive loads with these op

amps (e.g., > 100 pF when G = +1), a small series

resistor at the output (RISO in Figure 4-3) improves the

feedback loop’s stability by making the output load

resistive at higher frequencies; the bandwidth will

usually be decreased.

FIGURE 4-3:

Output Resistor, RISO

stabilizes large capacitive loads.

Bench measurements are helpful in choosing RISO.

Adjust RISO so that a small signal step response (see

Figure 2-14) has reasonable overshoot (e.g., 4%).

MCP6LX

VDD

R1 >

VSS – (minimum expected V1)

2mA

R2 >

VSS – (minimum expected V2)

2mA

MCP6LX

RISO

VOUT

MCP6LX

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