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STM32F101XC Fiches technique(PDF) 86 Page - STMicroelectronics |
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STM32F101XC Fiches technique(HTML) 86 Page - STMicroelectronics |
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86 / 106 page ![]() Electrical characteristics STM32F101xC, STM32F101xD, STM32F101xE 86/106 Doc ID 14610 Rev 7 Figure 44. SPI timing diagram - master mode(1) 1. Measurement points are done at CMOS levels: 0.3VDD and 0.7VDD. 5.3.17 12-bit ADC characteristics Unless otherwise specified, the parameters given in Table 53 are derived from tests performed under ambient temperature, fPCLK2 frequency and VDDA supply voltage conditions summarized in Table 10. Note: It is recommended to perform a calibration after each power-up. ai14136 CPHA= 0 MOSI OUTUT MISO INP UT CPHA= 0 MS BIN M SB OUT BI T6 IN LSB OUT LSB IN CPOL=0 CPOL=1 B I T1 OUT NSS input tc(SCK) tw(SCKH) tw(SCKL) tr(SCK) tf(SCK) th(MI) High CPHA=1 CPHA=1 CPOL=0 CPOL=1 tsu(MI) tv(MO) th(MO) |
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