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SC63C0316 Fiches technique(PDF) 21 Page - Silan Microelectronics Joint-stock |
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SC63C0316 Fiches technique(HTML) 21 Page - Silan Microelectronics Joint-stock |
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21 / 24 page ![]() SC63C0316 HANGZHOU SILAN MICROELECTRONICS CO.,LTD REV:1.0 2004.08.03 Http: www.silan.com.cn Page 21 of 24 Table12. Maximum Number of Display Digits Per Duty Cycle LCD Duty LCD Bias COM Output Pins Maximum Digit Display 8 Segment Pins) Static Static COM0 4 1/2 1/2 COM0–COM1 8 1/3 1/2 COM0–COM2 12 1/3 1/3 COM0–COM2 12 1/4 1/3 COM0–COM3 16 Table 13. LCD Mode Control Register (LMOD) Organization (8-Bit W) LMOD.7 LCD voltage dividing register control bit 0 Internal voltage dividing resistor. 1 External voltage dividing resistor; internal voltage dividing resistors are off. LMOD.6 Always logic zero LMOD.5 LMOD.4 LCD Clock (LCDCK) Frequency 0 0 fw/2 9 = 64 Hz 0 1 fw/2 8 = 128 Hz 1 0 fw/2 7 = 256 Hz 1 1 fw/2 6 = 512 Hz LMOD.3 LMOD.2 LMOD.1 LMOD.0 Duty and Bias Selection for LCD Display 0 x x x LCD display off 1 0 0 0 1/4 duty, 1/3 bias 1 0 0 1 1/3 duty, 1/3 bias 1 0 1 0 1/2 duty, 1/2 bias 1 0 1 1 1/3 duty, 1/2 bias 1 1 0 0 Static NOTE:'x' means 'don't care'. LCD DRIVE VOLTAGE The LCD display is turned on only when the voltage difference between the common and segment signals is greater than VLCD. The LCD display is turned off when the difference between the common and segment signal voltages is less than VLCD. NOTE: The LCD panel display may deteriorate if a DC voltage is applied that lies between the common and segment signal voltage. Therefore, always drive the LCD panel with AC voltage COMMON (COM) SIGNALS The common signal output pin selection (COM pin selection) varies according to the selected duty cycle. |
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