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ADM2914 Fiches technique(PDF) 12 Page - Analog Devices

No de pièce ADM2914
Description  Quad UV/OV Positive/Negative Voltage Supervisor
PDF  16 Pages
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
Logo AD - Analog Devices

ADM2914 Fiches technique(HTML) 12 Page - Analog Devices

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ADM2914
Rev. 0 | Page 12 of 16
UV AND
The
OV RISE AND FALL TIMES
UV and
)
)(
(
2
.
2
LOAD
UP
PULL
R
C
R
t
OV output rise times (from 10% to 90%) can be
approximated using the following formula:
where:
RPULL-UP is the internal weak pull-up resistance with an approx-
imate value of 400 kΩ at room temperature with VCC > 1 V.
CLOAD is the external load capacitance on the output pin.
When a fault occurs, the UV or
)
)(
(
2
.
2
LOAD
DOWN
PULL
F
C
R
t
OV output fall time can be
expressed as
where RPULL-DOWN is the internal pull-down resistance, which is
approximately 50 Ω. Assuming a load capacitance of 150 pF, the
fall time is 16.5 ns.
UV/
Both the
OV OUTPUT CHARACTERISTICS
OV and UV outputs have a strong pull-down to
ground and a weak internal pull-up to VCC. This permits the pins
to behave as open-drain outputs. When the rise time on the pin
is not critical, the weak pull-up removes the requirement for an
external pull-up resistor. The open-drain configuration allows
for wire-OR’ing of outputs, which is particularly useful when
more than one signal needs to pull down on the output.
At VCC = 1 V, a maximum VOL = 0.15 V at UV is guaranteed. At
VCC = 1 V, the weak pull-up current on OV is almost turned on.
Consequently, if the state and pull-up strength of the OV pin are
important at very low VCC, an external pull-up resistor of no more
than 100 kΩ is advised. By adding an external pull-up resistor,
the pull-up strength on the
GLITCH IMMUNITY
OV pin is greater. Therefore, if it is
connected in a wire-OR’ed configuration, the pull-down strength
of any single device must account for this additional pull-up
strength.
The ADM2914 is immune to short transients that may occur
on the monitored voltage rails. The device contains internal
filtering circuitry that provides immunity to fast transient
glitches. Figure 9 illustrates glitch immunity performance by
showing the maximum transient duration without causing a
reset pulse. Glitch immunity makes the ADM2914 suitable for
use in noisy environments.
UNDERVOLTAGE LOCKOUT (UVLO)
The ADM2914 has an undervoltage lockout circuit that monitors
the voltage on the VCC pin. When the voltage on VCC drops
below 1.9 V (minimum), the circuit is activated. The UV output
is asserted and the OV output is cleared and not allowed to
assert. When VCC recovers, UV
SHUNT REGULATOR
exhibits the same timing
characteristics as if an undervoltage condition had occurred on
the inputs.
The ADM2914 is powered via the VCC pin. The VCC pin can be
directly connected to a voltage rail of up to 6 V. In this mode,
the supply current of the device does not exceed 100 µA. An
internal shunt regulator allows the ADM2914 to operate at
higher input voltage levels by placing a shunt resistor in series
between the supply rail and the VCC pin to limit the input current
to less than 10 mA. Use Figure 7 in the Typical Performance
Characteristics section to assist in determining the value of
this resistance. Choose an appropriate location on the curve to
accommodate variations in VCC due to changes in current through
the dropper resistor.
OV
If an overvoltage condition occurs when the
LATCH (ADM2914-1)
LATCH pin is
pulled low, the OV pin latches low. Pulling LATCH high clears
the latch. If an OV condition clears while LATCH is high, the
latch is bypassed and the OV pin behaves in the same way as the
UV pin, with an identical timeout period. If the LATCH pin is
pulled low while the timeout period is active, the OV
DISABLE (ADM2914-2)
pin
latches low, as in normal operation.
Pulling the DIS pin high disables both the UV and OV outputs,
and forces both outputs to remain weakly pulled high, regard-
less of any faults that are detected at the inputs. If a UVLO
condition is detected, the UV output is asserted and pulls low;
however, the timeout function is bypassed. As soon as the
UVLO condition clears, the UV output pulls high. To guarantee
normal operation when the pin is left unconnected, DIS has a
weak 2 µA internal pull-down current.



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