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AD9572ACPZLVD-R7 Fiches technique(PDF) 12 Page - Analog Devices

No de pièce AD9572ACPZLVD-R7
Description  Fiber Channel/Ethernet Clock Generator IC, PLL Core, Dividers, 7 Clock Outputs
PDF  20 Pages
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
Logo AD - Analog Devices

AD9572ACPZLVD-R7 Fiches technique(HTML) 12 Page - Analog Devices

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AD9572
Rev. 0 | Page 12 of 20
TYPICAL PERFORMANCE CHARACTERISTICS
Both 100 MHz and 125 MHz outputs enabled; 33.3 MHz output disabled.
–100
–150
–140
–130
–120
–110
–100
–160
–150
–140
–130
–120
–110
1k
10k
100k
1M
100M
10M
FREQUENCY (Hz)
–160
1k
10k
100k
1M
100M
10M
FREQUENCY (Hz)
Figure 7. 106.25 MHz Phase Noise
–100
–150
–140
–130
–120
–110
–160
1k
10k
100k
1M
100M
10M
FREQUENCY (Hz)
Figure 8. 125 MHz Phase Noise
–100
–150
–140
–130
–120
–110
–160
1k
10k
100k
1M
100M
10M
FREQUENCY (Hz)
Figure 9. 25 MHz Phase Noise
Figure 10. 156.25 MHz Phase Noise
–100
–160
–150
–140
–130
–120
–110
1k
10k
100k
1M
100M
10M
FREQUENCY (Hz)
Figure 11. 100 MHz Phase Noise



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