PCA2003USLASH10ACSLASH1 datasheet(11/21 Pages) NXP

11 / 21 page

PCA2003_2

Product data sheet

Rev. 02 — 21 July 2009

11 of 21

NXP Semiconductors

PCA2003

32 kHz watch circuit with programmable adaptive motor pulse

In any case, the instruction states are terminated automatically 2 seconds after the last

supply modulation pulse.

7.7 Programming the memory cells

Applying the two-stage programming pulse (see Figure 7) transfers the stored data in the

shift register to the OTP cells.

Perform the following to program a memory word:

1. Starting with a VP(prog)(start) pulse wait for the time period t0 then set the instruction

counter to the word to be written (td =t1).

2. Enter the data to be stored in the shift register (td =t2 or t3). LSB ﬁrst (bit 8) and the

MSB last (bit 1).

3. Applying the two-stage programming pulse Vprestore followed by Vstore stores the word.

The delay between the last data bit and the prestore pulse Vprestore is td =t4. Store the

word by raising the supply voltage to Vstore; the delay between the last data bit and the

store pulse is td.

The example shown in Figure 7 performs the following functions:

• Start

• Setting instruction counter to state 4 (word B)

• Entering data word 110101 into the shift register (sequence: LSB ﬁrst and MSB last)

• Writing to the OTP cells for word B

VDD(nom): nominal supply voltage.

The example shows the programming of B = 110101 (the sequence is MSB ﬁrst and LSB last).

Fig 7.

Supply voltage modulation for programming

mgw356

VDD(nom)

VP(mod)

VDD

VSS

VP(prog)(start)

tp(start)

t1 t1 t1

tw(store)

Vstore

Vprestore

tw(prestore)

PCA2003U/10AC/1 Fiches technique(PDF) 11 Page - NXP Semiconductors

PCA2003U/10AC/1 Fiches technique(HTML) 11 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21

Fiches technique Télécharger

Lien URL