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TLC7225C Fiches technique(PDF) 7 Page - Texas Instruments |
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TLC7225C Fiches technique(HTML) 7 Page - Texas Instruments |
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7 / 21 page ![]() TLC7225C, TLC7225I QUADRUPLE 8-BIT DIGITAL-TO-ANALOG CONVERTERS SLAS109B – OCTOBER 1996 – REVISED FEBRUARY 2001 7 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PARAMETER MEASUREMENT INFORMATION VDD 0 V VDD 0 V VDD 0 V Data In Address WR th(AW) tw1 tsu(AW) VDD 0 V Data Valid LDAC tw2 tsu(DW) th(DW) NOTES: A. tr = tf = 20 ns over VDD range. B. The timing-measurement reference level is equal to VIH + VIL divided by 2. C. If LDAC is activated prior to the rising edge of WR, then it must remain low for at least tw2 after WR goes high. Figure 1. Write-Cycle Voltage Waveforms TYPICAL CHARACTERISTICS Figure 2 OUTPUT CURRENT vs OUTPUT VOLTAGE 200 150 100 50 0 – 0.1 – 0.2 – 0.3 – 0.4 – 2 – 10 1 2 VO – Output Voltage – V Source Current Short-Circuit Limiting Sinking Current Source TA = 25°C VSS = – 5 V DB0– DB7 = 0 V VDD = 15 V 200 100 600 0 0 1 234 5 6 400 300 500 OUTPUT CURRENT (SINK) vs OUTPUT VOLTAGE 700 78 9 10 TA = 25°C VDD = 15 V VSS = – 5 V VSS = 0 VO – Output Voltage – V Figure 3 |
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