| Moteur de recherche de fiches techniques de composants électroniques |
|
AND1743FST-T Fiches technique(PDF) 3 Page - Purdy Electronics Corporation |
|
|
|||||||||||||||||||||||||||||
AND1743FST-T Fiches technique(HTML) 3 Page - Purdy Electronics Corporation |
|
3 / 4 page ![]() Intelligent Graphics Display AND1743FST-T Purdy Electronics Corporation • 720 Palomar Avenue • Sunnyvale, CA 94085 3 Tel: 408.523.8200 • Fax: 408.733.1287 • sales@ANDdisplays.com • www.purdyelectronics.com 7/20/07 Power Supply LCD panel is driven by the voltage VDD–VEE, so adjustable VEE is required for contrast control and temperature compensation. Timing Relationships and Diagram Timing Diagram Block Diagram Temperature Variations Temperature V DD–VEE (MST) V DD–VEE (BST) 0°C 21.0 20.0 +25°C 19.5 18.5 +50°C 17.6 16.6 Signal Timing Relationships Item Symbol Min. Max. Unit C/D Set Up Time tCDS 100 – ns C/D Hold Time tCDH 10 – CE , RD, WR Pulse Width tCEtRD,tWR 80 – Data Set Up Time tDS 80 – Data Hold Time tDH 40 – Access Time tACC – 150 Output Hold Time tOH 10 50 Power Supply |
|
|
Lien URL |
| ALLDATASHEET vous a-t-il été utile ? [ DONATE ] |
À propos de Alldatasheet | Publicité | Contactez-nous | Politique de confidentialité | Lien vers la fiche technique | Echange de liens | Fabricants All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |