SN74ALVCH16500

18-BIT UNIVERSAL BUS TRANSCEIVER

WITH 3-STATE OUTPUTS

SCES023G – JULY 1995 – REVISED MAY 2000

1

POST OFFICE BOX 655303

Widebus

™ Family

CMOS) Submicron Process

Combines D-Type Latches and D-Type

Flip-Flops for Operation in Transparent,

Latched, or Clocked Mode

MIL-STD-883, Method 3015; Exceeds 200 V

Using Machine Model (C = 200 pF, R = 0)

JESD 17

Need for External Pullup/Pulldown

Resistors

Shrink Small-Outline (DL) and Thin Shrink

Small-Outline (DGG) Packages

description

This 18-bit universal bus transceiver is designed

Data flow in each direction is controlled by

output-enable (OEAB and OEBA), latch-enable

(LEAB and LEBA), and clock (CLKAB and

CLKBA) inputs. For A-to-B data flow, the device

operates in the transparent mode when LEAB is

high. When LEAB is low, the A data is latched if

CLKAB is held at a high or low logic level. If LEAB

is low, the A data is stored in the latch/flip-flop on

the

high-to-low

transition

of

CLKAB.

Output-enable OEAB is active high. When OEAB

is high, the B-port outputs are active. When OEAB

is

low,

the

B-port

outputs

are

in

the

high-impedance state.

Data flow for B to A is similar to that of A to B, but uses OEBA, LEBA, and CLKBA. The output enables are

complementary (OEAB is active high, and OEBA is active low).

pullup resistor and OEAB should be tied to GND through a pulldown resistor; the minimum value of the resistor

is determined by the current-sinking/current-sourcing capability of the driver.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

The SN74ALVCH16500 is characterized for operation from –40

°C to 85°C.

DGG OR DL PACKAGE

(TOP VIEW)

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OEAB

LEAB

A1

GND

A2

A3

A4

A5

A6

GND

A7

A8

A9

A10

A11

A12

GND

A13

A14

A15

A16

A17

GND

A18

OEBA

LEBA

GND

CLKAB

B1

GND

B2

B3

B4

B5

B6

GND

B7

B8

B9

B10

B11

B12

GND

B13

B14

B15

B16

B17

GND

B18

CLKBA

GND

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

EPIC, UBT, and Widebus are trademarks of Texas Instruments.

Copyright

© 2000, Texas Instruments Incorporated