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ATSAM2195 Fiches technique(PDF) 13 Page - ATMEL Corporation |
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ATSAM2195 Fiches technique(HTML) 13 Page - ATMEL Corporation |
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13 / 19 page ![]() 13 6308A–DRMSD–10-May-07 ATSAM2195 7. Reset and Power Down During power-up, the RESET input should be held low until the crystal oscillator and PLL are stabilized, which can take about 20 ms. A typical RC/diode power-up network can be used. After RESET, the ATSAM2195 enters an initialization routine. It takes around 50 ms before a MIDI IN or MPU message can be processed. Audio begins after 500 ms, maximum. To enter power-down, Reset should be held low 500 ms min and then PDWN asserted low. In Power-down mode, the crystal oscillator and PLL are stopped. The chip enters a deep power down sleep mode. To exit power down, PDWN has to be asserted high, then RESET applied. 7.1 3.3V Single Supply Application Power down mode is managed by the internal regulator. The equivalent schematic and standard connection is shown on the diagram below. ATSAM2195 |
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